System design method that takes advantage of Class D amplifiers in consumer electronics

This article refers to the address: http://

In a variety of consumer electronic audio applications, such as MP3 players, mobile phones, game consoles, LCD TVs, and home theaters, the importance of switching amplifiers or Class D amplifiers is rapidly increasing. The most prominent advantage of Class D amplifiers is their high efficiency, which can be as high as 85 to 90% in practical applications, while linear Class AB amplifiers typically achieve efficiencies of only about 25% at typical listening levels.

In handheld applications, the low power dissipation characteristics of Class D amplifiers allow designers to extend battery charging intervals while maintaining audio performance. Battery life is a key performance metric for all personal communication and audio equipment, and the power efficiency of Class D amplifiers for power-operated devices such as audio and video (AV) products and game consoles The device can operate at lower supply voltages and reduce heat generation. As a result, design engineers can choose smaller heat sinks to reduce product size and reduce material and assembly costs. In fact, a carefully designed power supply can deliver up to several watts of output per channel without the need for a heat sink.

Class D amplifier solution

In a Class D amplifier, the audio signal is compared to a sawtooth wave with a switching frequency much higher than the audio range (Figure 1), producing a pulse-width modulated (PWM) square wave with a periodic period of sawtooth. This pulse width signal represents a sample of the audio signal. The PWM square wave and its inverted signal then drive the MOSFET output stage (usually the H-bridge) to produce an amplified square-wave sampled signal. Finally, the sampled signal is filtered by a low pass filter to regenerate the amplified audio signal.

Due to the presence of MOSFET gate capacitance, increasing the switching frequency will cause more losses in the output stage, but the higher switching frequency can increase the effective resolution of the PWM modulator (very similar to the oversampling process of the sigma-delta modulator) Increasing the switching frequency also brings some benefits, such as lowering the output filtering requirements and improving the audio signal-to-noise ratio (SNR). Noise shaping can be used to further improve performance. Taking Wolfson's WM8608 Class D amplifier IC as an example, when the pulse frequency is 384kHz (8 times the 48kHz sampling rate), the signal-to-noise ratio can reach more than 100dB (A-weighted).

Keeping the internal clock "clean" is critical because any jitter can cause random changes in the timing of the edges of the PWM signal, which can create noise in the analog output. Therefore, this clock is generated by the system master clock through an on-chip low-noise phase-locked loop (PLL). This eliminates most of the jitter as long as the primary clock is "clean" enough. Therefore, it is also feasible to directly generate a master clock inside the class D amplifier IC. This approach will prevent interference from the output stage of the switch or elsewhere from affecting the quality of the clock signal by maintaining a connection between the oscillator and the on-chip PLL. In addition, it does not require an external PLL filter component. In order for the noise to not affect the 3.3V analog supply that powers the PLL, a decoupling filter can be placed close to the power supply pin.

Figure 1: Class D amplifier has two output stages: the first stage is a comparator that converts the PCM input into a modulated square wave; the second stage is a half-bridge converter with a low-pass filter at the output.
Figure 1: Class D amplifier has two output stages: the first stage is a comparator that converts the PCM input into a modulated square wave; the second stage is a half-bridge converter with a low-pass filter at the output.

Power stage design

The design of the power bridge (Figure 2) depends on the desired output power of the amplifier. For example, there are already Class D amplifier ICs with headphone drivers and Class D amplifier ICs with speaker drivers on the market. The output stage design is one of the main differences in these configurations. Amplifiers designed to drive speakers can deliver output power from less than 1 watt to up to several watts without the need for a heat sink. These ICs provide a single-chip solution for many consumer electronics applications, from portable media players (PMPs) to game consoles and some LCD TVs. For most of the above applications (especially handheld products), a single-chip solution is indispensable.

However, in order to achieve very high output power, a class D modulator IC can be combined with an external output stage using a fast switching power MOSFET. They can be discrete components or integrated into a single IC. The modulator must provide a matching pre-driver, and the output stage MOSFET must be optimized for digital audio operation. The on-resistance R on of the power MOSFET heats up and reduces power efficiency, so the resistor should be as small as possible. To minimize power consumption and heat generation in the level shifter used to drive the MOSFET, the MOSFET gate capacitance should also be reduced. For the same reason, it is also important to reduce the input capacitance of the level shifter. A high gate capacitance will also cause RC delay, which ultimately reduces the switching speed of the transistor.

A less obvious potential problem is the matching of switching characteristics between transistors. For example, if the turn-on speed of an NMOS device is much faster than the turn-off speed of its corresponding PMOS device, the turn-on time of the two devices may have a small overlap at the edge of the signal. When both devices are turned on at the same time, the power supply is essentially short-circuited, resulting in reduced power efficiency, increased heat dissipation, and the possibility of a sudden drop in the supply voltage causing distortion of the audio signal. To maintain signal integrity, the switching delay of the output stage (power MOSFET and level shifter) should be less than the minimum PWM pulse width.

Some vendors offer integrated output stages that can be directly connected to the output of a Class D modulator IC. These output stages, which typically contain four matched power MOSFETs per channel, also perform level shifting of the PWM signal: converting 3.3V at the output of the amplifier to a higher voltage that can control the power device.

Figure 2: Class D amplifier with half-bridge output stage, but full H-bridge configuration is also common.
Figure 2: Class D amplifier with half-bridge output stage, but full H-bridge configuration is also common.

Cell Phone Holder and Monopod

SHAOXING COLORBEE PLASTIC CO.,LTD , https://www.fantaicolorbee.com

Posted on